Multi-tier $\mathrm{N}=4$ Binary Stacking, combining Face-to-Face and Back-to-Back Hybrid Wafer-to-Wafer Bonding Technology

A binary wafer-to-wafer stacking scheme is advantageous over a sequential approach in terms of manufacturing cost and its impact on the stacked system yield. In this paper, such a binary wafer-to-wafer stacking flow is demonstrated. Two full thickness wafers are paired Face-to-Face using a $2\mu \mathrm{m}$ pitch hybrid bonding technology, followed by top wafer thinning to $2\mu \mathrm{m}$ . The Face-to-Face connections are fed through to the thinned top wafer surface by means of a $1\mu \mathrm{m}$ diameter by $5\mu \mathrm{m}$ deep via-last TSV. $2\mu \mathrm{m}$ pitch hybrid backside pads are realized on top of these via-last TSVs, at the same time levelling out and planarizing the backside of the Face-to-Face bonded wafer pairs. Two $\mathrm{N}=2$ Face-to-Face bonded wafer pairs are Back-to-Back hybrid bonded to each other, realizing an $\mathrm{N}=4$ multi-tier wafer stack. The N4 top wafer is thinned to $5\mu \mathrm{m}$ , revealing the nails of $5\mu \mathrm{m}$ diameter by $8\mu \mathrm{m}$ deep via-middle TSVs, implemented on this N4 wafer prior to the Face-to-Face bonding. An N4 backside passivation and an aluminum METPASS module finishes the multi-tier $\mathrm{N}=4$ process flow. The paper describes the realization of the above explained integration flow. Several process challenges are extensively elaborated. Electrical results, featuring 100% yielding Back-to-Back kelvin and interwoven chains connections, demonstrate the maturity of this multi-tier $\mathrm{N}=4$ binary stacking process.