Beam test results of a 15 ps timing system based on ultra-fast silicon detectors

N. Cartiglia, A. Staiano,V. Sola,R. Arcidiacono, R. Cirio,F. Cenna,M. Ferrero, V. Monaco,R. Mulargia, M. Obertino,F. Ravera, R. Sacchi,A. Bellora, S. Durando,M. Mandurrino,N. Minafra, V. Fadeyev,P. Freeman, Z. Galloway, E. Gkougkousis,H. Grabas, B. Gruey, C. A. Labitan, R. Losakul, F. McKinney-Martinez,H. F. -W. Sadrozinski, A. Seiden, E. Spencer, M. Wilder, N. Woods,A. Zatserklyaniy,G. Pellegrini,S. Hidalgo, M. Carulla,D. Flores,A. Merlos, D. Quirion, V. Cindro, G. Kramberger, I. Mandic,M. Mikuz,M. Zavrtanik

arxiv(2016)

引用 0|浏览4
暂无评分
摘要
In this paper we report on the timing resolution of the first production of 50 micro-meter thick Ultra-Fast Silicon Detectors (UFSD) as obtained in a beam test with pions of 180 GeV/c momentum. UFSD are based on the Low-Gain Avalanche Detectors (LGAD) design, employing n-on-p silicon sensors with internal charge multiplication due to the presence of a thin, low-resistivity diffusion layer below the junction. The UFSD used in this test belongs to the first production of thin (50 {\mu}m) sensors, with an pad area of 1.4 mm2. The gain was measured to vary between 5 and 70 depending on the bias voltage. The experimental setup included three UFSD and a fast trigger consisting of a quartz bar readout by a SiPM. The timing resolution, determined comparing the time of arrival of the particle in one or more UFSD and the trigger counter, for single UFSD was measured to be 35 ps for a bias voltage of 200 V, and 26 ps for a bias voltage of 240 V, and for the combination of 3 UFSD to be 20 ps for a bias voltage of 200 V, and 15 ps for a bias voltage of 240 V.
更多
查看译文
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要