3.7-Ghz Multi-Bank High-Current Single-Port Cache SRAM with Leakage Saving Circuits in 3-Nm FinFET for HPC Applications

Yoshiaki Osada,Takaaki Nakazato,Yumito Aoyagi,Koji Nii,Jhon-Jhy Liaw,Shien-Yang Wu,Quincy Li,Hidehiro Fujiwara,Hung-Jen Liao,Tsung-Yung Jonathan Chang

IEEE JOURNAL OF SOLID-STATE CIRCUITS（2024）

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关键词

Cache family,FinFET,row decoder leakage saving (RDLS),static random-access memory (SRAM),write driver leakage saving,Cache family,FinFET,row decoder leakage saving (RDLS),static random-access memory (SRAM),write driver leakage saving

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