Simulation and Metrological Applications for RDL Patterning Development of Glass Substrate

This study proposes finite element analysis (FEA) combined to quantify the location shift before redistribution layer (RDL) photolithography process. In addition, related failure mechanism is utilized to analyze bulk strength of glass substrate under vacuum chucking. Furthermore, stress distribution is estimated for Cu RDL with varying aspect ratio.Based on accelerated demand for high bandwidth, innovation in both system and chip architectures are required to mitigate the slowing of Moore's law. Chiplet technology and heterogeneous integration with co-packaged Optics (CPO) is a suitable solution to overcome next generation bandwidth and power challenges involving ethernet switching, generative AI and high-performance computing (HPC). In addition, the heterogeneous integration combined with SoIC, CoWoS and InFo technologies is provided a solution to overcome the power, performance, area-cost, time to market (PPACt) factors. On the other hand, the glass substrate with build-up dielectric film is generated RDL first process under standard semi-additive process. The advantage of glass substrate is involved high structural integrity, tunable modulus as well as coefficient of thermal expansion (CTE) approximately silicon material. In addition, through-glass-vias (TGV) has been used for vertical interconnections of DC signal and RF.The study is discussed the glass substrate with copper layers under RDL first process. A Ti/Cu seed layer is sputtered onto the glass substrate. After photoresist (PR) coating, the glass substrate with the build-up dielectric film is suffered warpage deformation based on CTE mismatch. Under vacuum chucking, the prediction of location shift is crucial for the mask-less digital lithography technology because of longer observation time of traditional optical tool for large panel size. FEA has been utilized to simulate mechanical behavior involving stress and strain distribution. In addition, digital optical method has been detected field strain map and validated mechanical simulation.Subsequently, fracture mechanism has been utilized to analyze bulk strength of glass substrate under vacuum chucking condition. Due to multilayer stacking, it may cause warpage deformation based on stress accumulation. The location between build-up dielectric film and RDL layer adjacent to glass substrate has been suffered the risk of delamination. Global-local technology of FEA has been demonstrated to analyze the stress distribution for the tiny line width of RDL involving 2 μm, 1.5 μm and 1 μm. Furthermore, stress distribution has been estimated for Cu RDL with varying aspect ratio.