A Study of Flexible BEOL Design Rules Allowing Degreed Slanted Interconenction in Advanced Nodes

Flexible design rules of BEOL layers have gained widespread attention in advanced integrated circuit technology nodes, with the potential to yield substantial cost savings in manufacturing. In our previous work we have explored a type of 45-degree slanted interconnection in the BEOL layers under 7 nm logic design rules. The lithography aerial image simulation result revealed a promising 10-20% reduction in mask minimum area. In this study, we will extend the investigation to various angled slanted lines in BEOL interconnect layers, focusing on patterns featuring slanted lines with 18.5°–45°. These angles correspond to the connection of two vias at distances of 1–3 metal tracks, respectively. With our self-developed aerial image simulator, the design rules allowing these degreed slanted interconnections will be analyzed. After determining the critical size and minimum area, a comparison with the traditional rectilinear designs will be made to explore the potential advantages of these degreed slanted interconnection in terms of lithography complexity and cost reduction in chip manufacturing.