Multiple Bit Upsets in Register Circuits at the 5-nm Bulk FinFET Node.
IEEE International Reliability Physics Symposium（2024）
Abstract
Multiple bit upsets (MBUs) are observed in shift register circuits at the 5-nm bulk FinFET node for alpha particles and heavy ions. TCAD simulations on calibrated models are used to show SEU vulnerability as a function of ion strike distance and then compared with experimental results.
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Key words
soft error,FinFET,multibit upsets
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