An Injection-Locked Clock Multiplier with Adaptive Pulsewidth Adjustment and Phase Error Cancellation Achieving 43.9fs RMS Jitter and -255.5dB FoM.

Multi-phase clock generators have played more important roles in modern wireline transceivers with the rapid growth of the data rate. This ever-increasing demand has prompted the exploration of efficient solutions to continuously optimize their jitter performance, power efficiency, and area occupation. Injection-locked clock multipliers (ILCMs) based on ring voltage-controlled oscillators (RVCOs) are promising candidates due to their low jitter, energy efficient, small footprint, and inherent ability to generate multiple phases [1]–[2]. For ILCMs, optimal jitter is achieved only when the free-running frequency of the RVCO $(\mathrm{F}_{\text{FREE}})$ is close to the target frequency $(\mathrm{F}_{\text{ILFM}})$ . Therefore, in prior works, a frequency tracking loop (FTL) was used to match $\mathrm{F}_{\text{FREE}}$ and FILFM over process, voltage, and temperature (PVT) variations [1]–[6]. However, the phase accuracy and jitter performance of the existing ILCMs are still limited by the following two issues shown in Fig. 1. One is the non-optimal pulsewidth of the injection pulse and its drift with PVT variations, where the former will significantly degrade the phase noise suppression and the latter will deteriorate the ILCM's robustness and reliability. The other is the static phase error associated with the injection event, even when there is no frequency difference between $\mathrm{F}_{\text{FREE}}$ and $\mathrm{F}_{\text{ILFM}}$ . This phenomenon can be understood by noting that the injection pulse would accelerate the edge transition before the crossing point while slowing down the edge transition after the crossing point. These two opposite edge acceleration and deceleration would cause the crossing point deviate from the ideal position to induce the static phase error. To address these two issues, this paper analytically derives optimal injection pulse width, develops an adaptive pulsewidth adjustment technique to maintain the optimal noise suppression under different operating conditions, and proposes a complementary-injection scheme to eliminate the phase error. The prototype is measured to achieve 43.9fs RMS jitter and -59.1dBc spur with a jitter-power FoM of -255.5dB.