Roughness as an Important Metric for Si and SiGe Epi Growth

Yogendra K Yadav, Piyush Bhatt, Rajesh Sathiyanarayanan,Phillip Stout

2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)(2024)

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Abstract
One major problem with epitaxially grown layers/stacks is the formation of cross-hatch defects on the surface. The main causes of these defects were found to be (i) higher strain and (ii) surface roughness of the film. This work focuses on surface roughness extraction for epitaxially grown Si and SiGe layers. The epitaxial growth was modeled using Lattice Kinetic Monte Carlo (LKMC) module of Synopsys $^{TM}$. The average roughness was extracted and compared for different layer/stack configurations (thickness, number of Si/SiGe pairs in a stack) and process parameters (temperature, gas flow and pressure). The results of this study will help process engineers in deciding optimal process and stack parameters to minimize roughness and strain in the stack and thereby, minimize defect formation.
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Key words
Epitaxy,LKMC,Roughness,Strain and Crosshatch defects
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