Simple Circuit Implementation of String Scaling Fractional-order Memristor with Fixed Valid Frequency Range

Scaling fractional-order memristors (fracmemristors) are a new research topic. Although remarkable progress has been made in the study of such memristors, there are some problems that require further study, for example, the effect of input signals on the instantaneous valid frequency range, failure to obtain the corresponding time-domain electrical characteristic expression of the fracmemristor, and the requirement of circuit schematics for using numerous memristor emulators. Most memristors in string scaling fracmemristor (SSF) circuit configurations must be of the floating-type. Therefore, the design and implementation of the circuit schematic are challenging. Motivated by this need, a SSF with a fixed valid frequency range was implemented using a simple circuit in this study. First, the circuit configuration of the SSF with a fixed valid frequency range and high approximation benefit was proposed. Subsequently, a simple circuit schematic of an incremental and decremental SSF was designed, and the corresponding time-domain electrical characteristic expression of the fracmemristor was obtained. Finally, rich analysis results for the electrical characteristics of the SSF were obtained. A circuit implementation of the SSF was used to verify the applicability of the theory. The main contributions of this study are as follows: the SSF circuit configuration and its simple circuit schematic with a fixed valid frequency range and high approximation benefit were devised, and the corresponding expressions of the time-domain electrical characteristics and the analysis results for the electrical characteristics were obtained.