A $W$ -Band Stacked Frequency Quadrupler With a Dual-Driven Core Achieving 10.3% Drain Efficiency

A $W$ -band stacked quadrupler with a dual-driven second-stage doubler is presented that, to the best of the authors’ knowledge, demonstrates the highest $W$ -band drain efficiency in silicon while maintaining a competitive output power and harmonic rejection. Implemented in a 90-nm SiGe BiCMOS process, the proposed topology circumvents the need for an interstage balun by using a pair of push–push doublers (PPDs), whose input signals are 90 $^{\circ}$ out-of-phase, as an input stage to drive a third, dual-driven push–push doubler. The stacked dual-driven second stage allows for current reuse between the two stages while maintaining a large input swing on the output stage, promoting a highly efficient design. As a result, the quadrupler achieves a peak conversion gain of 2.2 dB, a peak output power of 6.8 dBm, a harmonic rejection of greater than 31 dBc, and a peak drain efficiency of 10.3%.