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High Density Multi-Chip Embedded Panel-Level Packaging Integration Technology

Xianming Chen,Benxia Huang, Yejie Hong, Lei Feng, Jindong Feng, Guilin Zhu, Gao Huang, Yanlin Dong, Wu Chen

2023 24th International Conference on Electronic Packaging Technology (ICEPT)(2023)

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Abstract
The development of advanced semiconductor packaging is focused on achieving high-density integration, superior performance, efficient thermal management, high reliability, ease of mass production, and low cost. This paper presents an innovative panel-level multi-chip embedded high-density packaging integration technology. It enables the establishment of electrical connections for single or doublesided I/O of multiple chips based on the design requirements of semiconductor packaging modules, resulting in system-level functionality. In terms of product structure, this technology enables the embedding of multiple chips within a cavity array frame with solid copper pillars. It facilitates direct connections between chips and packaging substrates through the creation of redistribution Layers (RDL). Additionally, stacked metal layers are connected vertically using solid copper pillars, leading to outstanding electrical performance of the packaging module. Furthermore, this technology promotes efficient heat dissipation by incorporating direct window openings and copper layers on the chip's backside, significantly enhancing chip efficiency and reliability. Moreover, this technology achieves chip embedding within the packaging substrate using a concise internal interconnection method, addressing inherent parasitic effects, heat dissipation, and reliability issues associated with traditional wire-bonding or flip-chip packaging methods. Currently, high-density multi-chip embedded panel-level packaging integration technology has gained substantial attention in the field of semiconductor packaging, particularly in power semiconductor applications. By embedding the driver chip and two MOSFET transistors, it enables the creation of system-level packaging power converter modules with high power density. This paper validates the application of this advanced packaging technology in power converter modules. The results of efficiency and operating temperature tests demonstrate significant advantages in terms of module integration, conversion efficiency, heat dissipation performance, reliability, and cost. Consequently, this technology holds promising prospects for a wide range of applications.
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Key words
Panel-Level,Multi-Chip Embedded,High Density,Packaging Integration Technology,High-Performance
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