Wide Temperature Range Modeling of Implanted Resistors Based on 4H-SiC CMOS Process

Accurate models of 4H-SiC implanted resistors over a wide temperature range are necessary for using 4H-SiC materials in high-temperature integrated circuits. This study presents models of 4H-SiC nonuniform Gaussian implanted resistors. The resistance values of the N+ implanted resistor and the p-well implanted resistor exhibit a nonlinear behavior with temperature. Specifically, they decrease and then increase as the temperature rises from room temperature to 575 K. The N+ implanted resistor shows the lowest resistance at 475 K, while the p-well implanted resistor exhibits the lowest resistance at 425 K. Experimental results indicate that the p-well implanted resistor has a higher sheet resistance of approximately 45.7 k Omega(-2), making it more suitable for accommodating large resistance loads in 4H-SiC integrated circuits. The N+ implanted resistor demonstrates a sheet resistance of approximately 178.7 Omega(-2). In addition, an artificial neural network (ANN) based on the Levenberg-Marquardt (LM) algorithm was used to perform SPICE modeling of nonuniform Gaussian implanted resistors. The local outlier factor (LOF) algorithm was employed to remove outliers in the test data, and the developed model had an average error of only 1.6%. The SPICE model developed for implanted resistors can be used to quickly and accurately design and simulate 4H-SiC integrated circuits.