Design of an Efficient NTT/INTT Architecture With Low-Complex Memory Mapping Scheme

Number Theoretic Transform (NTT) and Inverse NTT (INTT) are the key algorithms used to speed up polynomial multiplications in post-quantum cryptography (PQC). This brief proposes a cross-bank-write-back (CBWB) memory mapping scheme for memory-based NTT/INTT architecture with conflict-free access patterns. The proposed scheme enables a light-weight memory access patterns for high-radix butterflies. Moreover, it makes the datapath between the memory banks and the butterfly unit straightforward and hardware-friendly. Based on the CBWB scheme, this brief also proposes a solution to adopt a single decimation strategy for both NTT and INTT in PQC accelerators to reduce hardware resources. As a case study, an efficient NTT/INTT architecture has been implemented on the FPGA using the parameters of the PQC algorithm Falcon. Experimental results show that our design achieves better Area-Time Product (ATP) compared to the state-of-the-art designs.