Evaluation of Temperature-Humidity-Reverse Bias Robustness of 3^rd Generation 650V Class 4H-SiC Discrete Power MOSFET Devices

In this study, 3 ^rd generation 650V class 4H-SiC power MOSFET discrete devices from four different global manufacturers are stressed using a high-voltage, high-humidity, high-temperature, reverse bias (HV-H3TRB) test to assess their reliability. It is found that the moisture ingress is the root cause of the failure of test samples. Post-failure analysis results have displayed drain-source junction and gate oxide insulation layer breakdown as well as moisture-induced electrochemical migration of contaminated metals. TCAD simulation is performed to explore the effect of differences in the distribution of the electric field around the gate stack on the reliability of test samples. Our simulation and experimental investigation findings indicate that the pre-existing surface and bulk defects/voids, drain-source junction breakdown voltage margin ratio, gate-oxide thickness, and device internal structure design should be considered when designing, processing, fabricating, and packaging the 3 ^rd generation SiC MOSFETs. This would improve their temperature-humidity reverse bias robustness for humidity-critical applications.