Recent advances on reliability of FPGAs in a radiation environment

In recent years, SRAM-based Field-Programmable Gate Arrays (FPGAs) have seen a surge in deployment within aerospace applications. Despite their widespread use, these FPGAs, particularly their embedded Static Random Access Memory (SRAM) and user logic, exhibit a notable susceptibility to Single Event Upsets (SEU), a phenomenon leading to erroneous connections or routing discrepancies. This paper presents an exhaustive survey of fault-tolerance methodologies pertinent to SRAM-based FPGAs operating in radiationintensive environments. Initially, we delineate the architecture of the SRAM-based FPGAs, elucidating the mechanisms underlying SEU occurrences and their subsequent malfunctions. This is followed by a detailed exploration of various strategies employed to assess the resilience of SRAM-based FPGAs against SEUrelated disruptions, mainly including the Triple Module Redundancy (TMR) and the configuration scrubbing technology. Collectively, this survey aspires to function as an instructive compendium for engineers and researchers specializing in the development of fault-tolerance mechanisms for SRAM-based FPGAs, particularly in the context of aerospace applications.