20.1 NVE: A 3nm 23.2TOPS/W 12b-Digital-CIM-Based Neural Engine for High-Resolution Visual-Quality Enhancement on Smart Devices

Ming-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, Ming-Hung Lin,Pei-Kuei Tsung,En-Jui Chang, Jenwei Liang, Shu-Hsin Chang, Chung-Lun Huang, You-Yu Nian, Zhe Wan,Sushil Kumar,Cheng-Xin Xue, Gajanan Jedhe, Hidehiro Fujiwara,Haruki Mori,Chih-Wei Chen, Po-Hua Huang, Chih-Feng Juan, Chung-Yi Chen,Tsung-Yao Lin, Ch Wang,Chih-Cheng Chen,Kevin Jou

2024 IEEE International Solid-State Circuits Conference (ISSCC)(2024)

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摘要
Enhancing video quality is critical for achieving a boosted user experience on smart devices including mobiles, televisions, and monitors. Practical hardware designs should deliver high performance with minimal resources under the stringent limitations related to bandwidth, area and energy budget. The widespread usage of deep-learning algorithms in image processing tasks, including super-resolution (SR) and noise-reduction (NR), has further emphasized the necessity for energy-efficient hardware solutions. Therefore, an emerging critical requirement is to deploy these algorithms in real-time and high-resolution scenarios. However, achieving this goal presents several challenges, as illustrated in Fig. 20.1.1: 1) High-resolution network inference considerably increases power consumption due to its computational complexity, low sparsity and high-precision requirements; 2) frequent high-precision data transactions to external memory result in substantial power usage related to bandwidth usage; 3) efficient and flexible mechanisms are essential to support the diverse network structures and operations.
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关键词
Neural Engineering,Convolution,Computer Vision,Feature Maps,Load Data,Energy Budget,Feature Map Size,Video Quality,Flexible Mechanism,Image Processing Tasks,External Memory,Area Overhead,Memory Allocation,Algorithm In Scenarios,Workload Balance,Output Buffer,Super-resolution Task,Fusion Mode,Pipeline Flow
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