Performance improvement in reservoir computing by using HfZrO₂ FeFETs through operating voltage optimization

We have investigated how the parameters of an input gate voltage (V-g) waveform and a drain voltage (V-d) impact the performance of reservoir computing (RC) using a Hf0.5Zr0.5O2 ferroelectric FET (FeFET). The RC performance is maximized by the high swing amplitude of the V-g and the most symmetrical polarization switching condition in the triangular-shaped input waveform, obtained by the center V-g of 0.5 V, because of the enhanced polarization switching of the FeFETs. Regarding the V-d dependence, the amount of the drain current and polarization switching have a trade-off relationship. As a result, a moderate V-d of 1.0 V becomes optimum in terms of the RC performance because a difference in drain current responses between different gate input patterns is maximized with this V-d. Furthermore, high computing capacities are achieved by combining the above optimal bias condition with drain current responses to both original and inverted gate input patterns.