Enhanced implementation of a state machine-based decoder for optimal modulation of multilevel converters

Multilevel converters (MLCs) have become a trend for many industrial applications, often even being a requirement. MLCs have several advantages over conventional converters. However, the increased number of switching devices and passive elements introduce challenges related to the system reliability, command, and control. The modulation of MLC can be challenging because there are several redundant states that reach the same voltage. Thus, to obtain an optimized modulation, some authors propose to use an improved strategy that separates the tasks of voltage level selection and distribution of switching events through a state machine decoder. Although flexible, this approach is not applicable in various digital signal processors (DSP) and microcontroller units (MCU), but requires an fast field -programmable gate array (FPGA) device. Furthermore, the computational burden required to calculate the next state can be a limiting factor for high -switching frequency converters. This article proposes a methodology to adapt a state machine decoder used in an optimized modulation of multilevel converters, making it compatible with DSPs with pulse -width modulation (PWM) peripherals. Experimental and simulation results are presented verifying the decoded modulation properties preservation: the expected harmonic gains of the phase -disposition PWM, keeping the natural balancing and equal cell switching utilization as the phase -shifted PWM.