Analyze the Loss Utilization in Near- $f_{\mathrm{max}}$ Embedded Amplifiers Using Uniform 3-D Gain Space: The Super-Gain-Boosting Technique

In this article, an analytical tool of uniform 3-D gain-space approach is proposed to analyze the impact of the lossy, linear, and reciprocal embedding networks (LRENs), as well as the lossy matching networks for near- $f_{\mathbf{max}}$ embedded amplifiers. Based on the uniform gain space approach, a super-gain-boosting technique, which involves the employment of the cross conductance to the differential pair as well as $Y$ -/ $Z$ -embedding networks is thoroughly studied and proposed to significantly boost the power gain. Compared with the conventional gain-boosting techniques, the proposed super-gain-boosting technique that can not only significantly boost Mason’s U of a transistor but also further obtain gain improvement benefiting from the intuitive uniform 3-D gain-space approach. Finally, to validate the proposed analytical approach, a three-stage amplifier is implemented in a 65-nm CMOS process based on the proposed super-gain-boosting technique and over-push gain-boosting technique. The three-stage amplifier demonstrates a measured $P_{\mathrm{sat}}$ of $-$ 1.95 dBm and a maximum PAE of 2.87% at 189 GHz, along with a maximum power gain of 32.1 dB.