Reducing leakage of single-qubit gates for superconducting quantum processors using analytical control pulse envelopes
arxiv(2024)
Abstract
Improving the speed and fidelity of quantum logic gates is essential to reach
quantum advantage with future quantum computers. However, fast logic gates lead
to increased leakage errors in superconducting quantum processors based on
qubits with low anharmonicity, such as transmons. To reduce leakage errors, we
propose and experimentally demonstrate two new analytical methods, Fourier
ansatz spectrum tuning derivative removal by adiabatic gate (FAST DRAG) and
higher-derivative (HD) DRAG, both of which enable shaping single-qubit control
pulses in the frequency domain to achieve stronger suppression of leakage
transitions compared to previously demonstrated pulse shapes. Using the new
methods to suppress the ef-transition of a transmon qubit with an
anharmonicity of -212 MHz, we implement R_X(π/2)-gates with a leakage error
below 3.0 × 10^-5 down to a gate duration of 6.25 ns, which
corresponds to a 20-fold reduction in leakage compared to a conventional Cosine
DRAG pulse. Employing the FAST DRAG method, we further achieve an error per
gate of (1.56 ± 0.07)× 10^-4 at a 7.9-ns gate duration,
outperforming conventional pulse shapes both in terms of error and gate speed.
Furthermore, we study error-amplifying measurements for the characterization of
temporal microwave control pulse distortions, and demonstrate that
non-Markovian coherent errors caused by such distortions may be a significant
source of error for sub-10-ns single-qubit gates unless corrected using
predistortion.
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