Resonant Gate Drive Circuit with Active Clamping to Increase Efficiency and Reliability

In power converters with high switching frequency, drive losses constitute a significant portion of the overall power losses. Resonant gate drivers can reduce drive losses, thereby enhancing the efficiency. However, resonant drivers suffer certain challenges: parameter drifts lead to the mismatch between the resonant frequency and the control frequency, and this mismatch can cause gate-to-source voltage overshoot. Moreover, the resonant driver is susceptible to external interference. This paper proposes a resonant circuit structure and control timing scheme aimed at overcoming these limitations. By incorporating a half-bridge clamp circuit, the proposed design achieves voltage clamping, thereby insulating the system from disturbances caused by mains power fluctuations. When there is a mismatch in resonant frequencies, the strategy employs a combination of hardware circuit diodes and control system timing to prevent overvoltage issues. Additionally, the utilization of MOSFETs minimizes the loss caused by prolonged current flow through body diodes, further reducing the resonant driving losses. Simulations have demonstrated the system's stability under varying resonant parameters and its effective anti-interference capabilities in voltage clamping. Experiments achieved a power saving of 83.3% at a 1 MHz operating frequency. Both simulations and experimental validations confirm the feasibility of the proposed solution, its effectiveness in interference suppression, handling of resonant mismatches, and its role in further augmenting power conservation.