Algorithm for Recording Synaptic Weights into a Memristor Matrix of Crossbar Elements

The creation of hardware systems for accelerating neural-network algorithms with memristor synaptic connections (nanostructured elements of electrically rewritable nonvolatile memory) is a promising direction in the development of tools for solving artificial-intelligence problems from the point of view of significantly reducing energy consumption while simultaneously increasing computing performance. However, with an ever-growing increase in the adjustable parameters in neural-network algorithms, the task of transferring them to a neuromorphic system “in a reasonable time” arises. At the same time, the memristor structures themselves have some variation in their parameters (switching voltage, range of variable resistances), which causes certain difficulties when working with them. An algorithm for recording synaptic weights is presented, which is focused on the balance between accuracy and speed of operation, and is also resistant to variations in the parameters of memristor structures. The model implementation of a formal neural-network algorithm with pretrained parameters transferred to the memristor basis is shown, and the influence of variations in memristor characteristics and conductor resistances on the process of recording weights and hardware operation of the neural network is shown.