3-STAR: A Super-steep switching, Stackable, and Strongly Reliable Transistor Array RAM for Sub-10nm DRAM and beyond

Kynghwan Lee, Sungwon Yoo, Jaeho Hong, Hyun-Cheol Kim, YongSeok Kim,Ilgweon Kim,Daewon Ha, Yu-Gyun Shin,Jaihyuk Song

2023 International Electron Devices Meeting (IEDM)(2023)

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摘要
A novel capacitor-less DRAM, named 3-STAR (A Super-steep switching, Stackable, and Strongly reliable Transistor Array RAM), is proposed, and investigated for the first time. The proposed device has vertical channel transistor (VCT) structure with gate-all-around (GAA) type of three gate stacks and is characterized by having poly-Si channel and trap layer between gate dielectric ( G ox ) and channel. Our results show super steep switching (subthreshold slope < 1 mV/dec), excellent memory window (MW > 2V), good retention (t R > 100sec at 85°C) and endurance (> 10 10 ) behaviors without any degradation. Trap layer is a key element because it has deep trap energy level, and it makes dramatically extend the lifetime of the base charge (Q base ) stored in trap layer. Therefore, the retention characteristics and MW are greatly improved. Since it protects G ox from deterioration, endurance characteristics is also extremely improved. In case of adding tunnel oxide (T ox ) between trap layer and poly Si, dual operation (DRAM mode, and NVM mode) is possible depending on the bias operating conditions because the Q base can be stored only in poly Si or stored both poly Si and trap layer. 3-STAR is a promising next DRAM device and can also be extended to new applications such as a neuromorphic area thanks to its dual mode and steep switching characteristics.
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关键词
Transistor Array,Endurance,Dual Mode,Gate Dielectric,polySia,Retention Characteristics,Vertical Channel,Dual Operation,Subthreshold Slope,Transistor Channel,Memory Window,Gate Stack,Increase In Temperature,Operation Mode,Fast Switching,Carrier Lifetime,Hot Electrons,Memory Characteristics,Hysteresis Behavior,Neuromorphic Devices
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