Demystifying Datapath Accelerator Enhanced Off-path SmartNIC
CoRR(2024)
摘要
Network speeds grow quickly in the modern cloud, so SmartNICs are introduced
to offload network processing tasks, even application logic. However, typical
multicore SmartNICs such as BlueFiled-2 are only capable of processing
control-plane tasks with their embedded CPU that has limited memory bandwidth
and computing power. On the other hand, hot cloud applications evolve, such
that a limited number of fixed hardware engines in a SmartNIC cannot satisfy
the requirements of cloud applications. Therefore, SmartNIC programmers call
for a programmable datapath accelerator (DPA) to process network traffic at
line rate. However, no existing work has unveiled the performance
characteristics of the existing DPA.
To this end, we present the first architectural characterization of the
latest DPA-enhanced BF3 SmartNIC. Our evaluation results indicate that BF3's
DPA is much wimpier than the off-path Arm and the host CPU. However, we still
identify that DPA has three unique architectural characteristics that unleash
the performance potential of DPA. Specifically, we demonstrate how to take
advantage of DPA's three architectural characteristics regarding computing,
networking, and memory subsystems. Then we propose three important guidelines
for programmers to fully unleash the potential of DPA. To demonstrate the
effectiveness of our approach, we conduct detailed case studies regarding each
guideline. Our case study on key-value aggregation service achieves up to
4.3× higher throughput by using our guidelines to optimize memory
combinations.
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