VLSI-Inspired Design Automation for Scalable Power Electronics Layout Optimization

Application of very large-scale integration circuit partitioning techniques toward those of power electronic systems reduces interconnect parasitics while improving overall power density. To that end, an EDA tool is currently being developed that utilizes VLSI partitioning and floorplanning approaches to synthesize power module layouts and arrange and interconnect them into functional converter systems from an annotated input netlist description. When coupled with a tool like PowerSynth, synthesized module layouts are quickly evaluated and optimized to find tradeoffs in electrical and thermal performance metrics while improving the quality of the results. Hierarchically arranging and interconnecting synthesized modules within this framework is then shown to reduce overall footprint and interconnects for a three-level active neutral point clamped inverter.