A 0.4-VIN, External-Capacitor-Free, Adaptive-Biased LDO with Look-Ahead Droop Reduction for Wake-up Features in Edge Devices.

Hee-Cheol Joo,Hyein Kim,Young-Ha Hwang

2023 20th International SoC Design Conference (ISOCC)(2023)

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Abstract
An external-capacitor-free, adaptive-biased low dropout regulator (LDO) suitable for supporting wake-up features in edge devices is presented. By employing a load-adaptive biasing scheme, the LDO prototype designed using 28nm LP CMOS achieves a 30,$000 \times -$scalable I LOAD range of 100 nA–3 mA with a low quiescent current of 8.61 nA–431 nA, even with an ultra-low input voltage of 0.4 V. Additionally, the proposed LDO reduces undershoot droop by looking ahead a wake-up signal and rapidly responding to drastic I LOAD changes. As a result, regulation failure can be prevented with a droop voltage improved to 62 mV at I LOAD change from 100 nA to 1 mA.
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Key words
Adaptive Biasing,Droop Reduction,Low Dropout Regulator (LDO),Low voltage,Wake up
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