A Low-Complexity Timing Skew Mismatch Calibration Method for Time-Interleaved ADCs.

This paper presents a timing skew mismatch calibration method for time-interleaved analog-to-digital converter (TIADC). This method has no restriction on the number of channels, only a sinusoidal signal is injected as the test signal. A four-channel TIADC simulation model with a resolution of 12bits was built. The ratio of input signal to sampling frequency is 0.410. The test signal after sampling is orthogonalized by a Hilbert filter. The digital signal operation is performed between the sampled test signal and its orthogonal signal, then the sinusoidal function of sampling skew mismatch can be extracted. The timing skew mismatch is obtained by the inverse sin module and compensated by the differentiator. After calibration of the proposed method, the signal noise ratio (SNR) is enhanced from 30.27dB to 62.21dB. Simulation results have been presented to demonstrate the effectiveness of the proposed method.