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A 0.83-pJ/b 20-Gb/s/Pin Single-Ended Transceiver With AC/DC-Coupled Pre-Emphasis FFE and Edge-Dependent Phase-Modulation DFE for Low-Power Memory Controllers

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS(2024)

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Abstract
This article presents an energy-efficient single-ended transceiver featuring the proposed AC/DC-coupled pre-emphasis feed-forward equalizer (PE-FFE) and edge-dependent phase-modulation decision feedback equalizer (PM-DFE) for low-power memory controllers. Specifically: 1) on the transmitter (Tx) side, an AC/DC-coupled PE-FFE is implemented in a ground-terminated Tx to minimize the equalization (EQ) power and maximize the output swing; 2) on the receiver (Rx) side, an edge-dependent PM-DFE operating on the full-swing signal edges is proposed for time-domain EQ, which improves sampling margin and reduces the linear EQ requirement as well as the power consumption. The design, fabricated in 22-nm CMOS, achieves a data rate of 20 Gb/s/pin with a 41 mV increase in the Tx output eye height and a 0.12 UI increase in the Rx sampling margin over a channel with a 10.3 dB loss. Measurement results reveal an energy efficiency of 0.45 pJ/b and 0.38 pJ/b for the Tx and the Rx, respectively, and a figure-of-merit of 0.081 pJ/b/dB (Tx + Rx).
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Key words
Impedance,Decision feedback equalizers,Transceivers,Modulation,Energy efficiency,Bandwidth,Memory management,Single-ended transceiver,low-power,memory controller,PHY interface,pre-emphasis,phase-modulation,feed-forward equalizer,decision feedback equalizer
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