Design of Multi-Channel High-Speed and High-Precision Digital Receiver Based on Multi-FPGA

Aiming at the radar signal processor for signal acquisition speed and multi-channel amplitude and phase consistency has high requirements, through the use of high-performance and high sampling rate ADC (analogue-to-digital converter) chip to achieve the SAR echo signal acquisition, with a number of high-performance FPGA to complete the real-time processing of data and FPGA inter-chip data transmission, and finally unified in a FPGA data group frame through the multiplexed TLK2711 interface to send to the digital transmission subsystem. TLK2711 interface sent to the digital transmission subsystem, designed and implemented a multi-FPGA multi-channel high-speed high-precision data processor design. The data processor up to 1.6Gsps sampling rate and 12-bit RESOLUTION RATIO synchronous acquisition of 8-channel signals, two FPGAs can be processed separately 4-channel data to achieve DBF synthesis, and through the SRIO interface to 10Gbps rate uniformly forwarded to the third FPGA. Experiments show that the designed data processor has a high sampling rate and sampling accuracy, and can achieve multi-channel data acquisition and real-time processing at high speed and high precision.