Design and Characterization of a Novel Transistor Outline (TO) Package With 3D Copper Frame

This paper introduces the design and characterization of a novel and cost-effective 3D double-side cooling package for a double-side patterned power device for the first time. The proposed package is based on the wire bond-less interconnect concept to improve package reliability. Special 3D copper frames are applied to achieve ultra-low package resistance and excellent thermal handling capability. The copper frame and epoxy encapsulation structure provide high voltage insulation capability and achieve different pattern interconnections on both sides of the chip. The electrical and thermal performance are analyzed experimentally.