A 1.5GS/s Single-Channel Pipelined ADC With Large Dither Technique

A 1.5GS/s12bit single-channel pipelined analog-to-digital converter (ADC) is presented in this paper. The ADC employs a novel large dither injection technique for non-linearity. At high sampling rates, the linearity of ADC is degraded due to the presence of ambiguous factors that result in harmonic distortion. By incorporating both charge dither and flash dither techniques, the proposed approach can exposure and correct nonlinear behavior without losing the dynamic range of ADC. The proposed technique is designed in a 2Snm CMOS technology. The results show an improvement in the spurious-free dynamic range (SFDR) from 70.1dB to 73.4dB.