A 400MHz 249.1TOPS/W 64Kb Fully-Reconfigurable SRAM-Based Digital Compute-in-Memory Macro for Accelerating CNNs.

2023 IEEE Asian Solid-State Circuits Conference (A-SSCC)(2023)

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摘要
Compute-in-memory (CIM) is a promising solution for neural networks performing vector-matrix multiplication with limited power by processing data inside a memory and minimizing energy-hungry data transfer between memory and processing elements. However, analog-based designs face several challenges such as non-ideal performance from PVT variations, ADC area and energy overhead, and conversion precision loss as illustrated in Fig. 1(Top) [1]–[2]. Digital CIMs have no accuracy degradation but show relatively low performance and energy efficiency [3]–[5]. The limited bit precision reconfigurability is also a big challenge as it restricts the use of CIM macro only for fixed neural network topologies.
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