High-speed clock sequencing module implementation of high precision time digital converter for brain PET

High-precision Time Digital Converter (TDC), a time measuring tool, can measure time periods to achieve picosecond accuracy. At present, it is widely used in satellite navigation, radar positioning, medical imaging, high energy physics and other cutting-edge scientific research fields. With the rapid development of semiconductor technology, the way of realizing TDC by analogue method has gradually withdrawn from the historical stage. The digital method based on FPGA (Field Programable Gate Array) has become the mainstream direction of high-precision time measurement technology due to its high flexibility, low-cost and short development cycle. In this paper, we improve a new NUMP TDC phase shift clock sequencing scheme and designed a high-speed clock sequencing scheme based on FPGA hard line logic resources. Through board-level verification analysis, it is found that the high-speed hardware sequencing scheme is feasible, which significantly reduces the time of clock sequencing, thus promoting the application of multichannel TDC and the study of high-precision brain PET time measurement.