A 6–18-GHz 6-bit Full-360$^{\circ}$ Vector-Sum Phase Shifter With Low Error in 40-nm CMOS

A 6–18-GHz ultrawideband vector-sum phase shifter (PS) with 6-bit digital phase control for phased-array system in SMIC 40-nm CMOS process is presented in this article. Combination of two inserted balanced buffers, elaborately optimized RC third-order I/Q signals generator, and novel complementary current source compensation technique contributes to the low rms phase and gain error. The fabricated PS exhibits a full-360 $^{\circ}$ tuning range with 5.625 $^{\circ}$ tuning step and good matching characteristics. The measured rms phase and gain error are, $<$ 1.82 $^{\circ}$ and $<$ 0.17 dB, respectively, over 6–18 GHz with a fractional bandwidth (FBW) of 100%. The measured input 1-dB compression point (IP $_{\text{1 dB}}$ ) is $\ge $ $-$ 3.9 dBm in the frequency band of interest with a power consumption of 42 mW from a 1.2-V supply. The core chip occupies an area of 0.46 mm $^{\text{2}}$ .