Digital Close-Loop Active Gate Driver for Static and Dynamic Current Sharing of Paralleled SiC MOSFETs

SiC power devices have been extensively for the high-power density application scenarios. To increase the current rating, SiC devices are usually connected in parallel. However, the mismatching current brought by unbalanced electrical parameters can increase the current stress of a device and pose reliability concern of the converter system. Aiming at addressing the current imbalance for paralleled SiC devices, this paper reports the application of an improved active gate driver (AGD) on the paralleled SiC MOSFETs to address the current imbalance problems. The three-level driver voltage can minimize the overshoot voltage and current. The adjustable turn-on voltage and gate signal delay time can realize the current sharing of both static and dynamic process. Current sensors and a digital controller are utilized for close-loop control. The functionality of the proposed AGD is validated in continuous operating experiment.