A 13 W, 94 mK Resolution, CMOS PDM Temperature-to-Digital Converter With Power-Gating Technique

This paper presents a CMOS phase-domain delta-sigma modulator (PD Delta Sigma M) that digitizes temperature-dependent phase shifts resulting from driving a poly-phase filter (PPF) at a constant frequency. Closed-loop architecture with a power-gating technique is applied to improve linearity and power efficiency. The design is implemented in a 0.18 mu m CMOS process. The temperature sensor has an inaccuracy of +/- 2.2 degrees C(3 sigma) from -40 degrees C to 85 degrees C. Furthermore, the design achieves a resolution of 94 mK at 1 kSa/s, while the chip area is 0.19 mm(2). The power consumption is 13 mu W, resulting in an inaccuracy FoM of 161.1 nJ center dot%(2).