Multi-channel multi-gigabit PRBS generator with a built-in clock in 0.18-μm CMOS technology

2017 International SoC Design Conference (ISOCC)(2017)

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Abstract
In this paper, a parallel pseudo-random bit sequence (PRBS) generator circuit with a built-in clock was designed in 0.18μm CMOS Technology. For high-speed operation, the current-mode logic (CML) was used in the circuit. In the PRBS generator, four-channel 2-Gb/s and two-channel 4-Gb/s PRBS signals can be generated. The power consumption of the chip is 554.3-mW at 1.8-V of power supply, and the chip area is 1.196×1.01-mm 2 . The PRBS generator can be suitable in multi-level modulation and multi-channel transmission tests.
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Key words
pseudo-random bit sequence (PRBS),current-mode logic (CML),built-in self-test (BIST)
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