Physics of electronic transport in low-dimensionality materials for future FETs

We discuss why low-dimensionality materials are needed to scale logic devices to the 5 nm gate-length. We discuss the advantages and disadvantages of graphene and graphene nanoribbons, the feasibility of Bose-Einstein condensation in bilayer graphene, and the use of 2D topological insulators, such as halogen-functionalized monolayer tin.