A 1^st Order Incremental Sigma-Delta with Refined Digitally Implemented Feed-Forward for 2-stage ADC

This paper introduces a first order incremental sigma-delta modulator for a 2-stage ADC and targets the use in image sensors. We applied a “Digitally Implemented Feed-Forward” (DIFF) technique and refined it with an assumption that the input signal is constant during the conversion. The modulator is fabricated in a test chip with extended counting SAR ADC. Experimental results show a linearity of |DNL| <; 1 with 12-bit output code, which indicates that our design achieves 12-bit linearity without code error.