8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory

We present an 8-layer 3D vertical Ru/AlO x N y /TiN RRAM device integrated with a transistor as current driver at the end of the vertical pillar. This RRAM cell is designed for low power and ultrahigh-density non-volatile memory: 1) a large low-resistance state (LRS) value of around 1 MΩ with an ON/OFF window of > 10 ² to ensure successful write/read operations for the worst-case cell in the array; 2) a thin (15 nm) Ru word-plane (WP) electrode to reduce parasitic resistance yet scalable vertically to > 128 layers; 3) 2-bit-per-cell capability that doubles the memory capacity. A 128-layer 3D vertical RRAM with Ru/AlO x N y /TiN can achieve bit density of 29.5 Gb/mm ² with 2 bits per cell and CMOS under Array (CuA), based on simulations that include leakage current, pillar, and WP resistances. Reliability tests show the RRAM cell can be reliably switched up to 3×10 ⁶ write/read cycles and maintain stable resistance states > 10 ⁴ s at 85 °C.