A 12-/14-bit, 4/2MSPS, 0.085mm2 SAR ADC in 65nm using novel residue boosting

2017 IEEE Custom Integrated Circuits Conference (CICC)(2017)

引用 0|浏览1
暂无评分
摘要
In this paper, a re-confîgurable 12/13/14-bit SAR ADC based on a 12-bit ADC core is presented. A novel residue-boosting algorithm is developed to increase the bit resolution of a SAR ADC up to 2 bits without significant additional area and power. In the 12-bit mode, the 65nm prototype shows both DNL and INL of about +/−0.5 LSB at 4MSPS, and in 14-bit mode, DNL and INL are about +/− 1 LSB and +/− 2 LSB at 2MSPS. ENOB is 11.5 bit and 13 bit for 12-bit and 14-bit mode each. The area of the ADC is 0.085mm 2 .
更多
查看译文
关键词
SAR ADC,Residue Boosting
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要