PlasticNet+: Extending Multi-FPGA Interconnect Architecture via Gigabit Transceivers

2021 IEEE International Symposium on Circuits and Systems (ISCAS)(2021)

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摘要
This paper addresses the communication challenges posed in multi-FPGA systems, by improving a custom FPGA interconnect architecture via the high-speed transceivers available in modern FPGA development boards. The proposed network interconnection, built upon the PlasticNet architecture, is evaluated using the high-speed serial transceiver in Zynq ZC706 FPGA boards. Results show a best-case latency of only 300 ns, demonstrating equivalent results in terms of latency on a par with the known BlueLink framework, but with the plus of having total re-configurability across the different layers of its network interconnection model. This makes the current proposal a competitive option for the development of distributed, heterogeneous multi-FPGA processing systems.
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关键词
Custom FPGA networks,HLS,AXI4,interconnect architecture,inter-FPGA communication,multi-FPGA distributed processing
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