Design and Experimental of a High-Power-Density DC-Bus Power Decoupling Module

This paper proposes a high-power-density DC-bus power pulsation decoupling module to address the instantaneous power imbalance issue between DC-side and AC-side of the single-phase inverter. The Dual-Buck buffer effectively prevents shoot-through problem of the bridge caused by false triggering of GaN FET. Additionally, this paper introduces a voltage control scheme based on interpolation predictor to compensate for control delay and to improve impedance characteristics of the power pulsation decoupling module, make it closer to that of electrolytic capacitors. The proposed active decoupling scheme employs long-life and highly reliable ceramic capacitors instead of conventional electrolytic capacitors, with the capacitance being theoretically optimized, and an impedance model being established to guide the design. A 2000W experimental prototype is built to validate the circuit performance.