Simulation Study of a Novel Low-Loss N-Channel SOI LIGBT With a Self-Adapted Parasitic Thyristor

A novel low loss silicon on insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) is proposed and investigated by simulation. It features a self-adapted parasitic thyristor (T*) , which is introduced owing to a P-drift region and an N carrier-stored (CS)-layer at the cathode side (PT LIGBT). In the ON-state, the T* is easily triggered as the sum of current gains of parasitic transistor (P+ anode/N-buffer/P-drift and N-buffer/P-drift/N-CS) equals to one, and then the PT LIGBT could enter the bipolar conduction state without the snapback effect. During the voltage rising period of turning off, the triggered T* remains ON-state for some time and prevents from forming and expanding depletion region in the P-drift, because the anode voltage (V-A) is sustained by the low hole density quasi-neutral P-drift region and remains a low value. During this period, the ON-state T* prolongs the voltage rising time and extracts excess carriers at low V-A value, which greatly reduces the current dropping time. Therefore, the turn-off loss ( E-off) is obviously reduced. During short-circuit, the PT LIGBT introduces P-drift to create an additional high temperature point at the anode side, helping to optimize heat distribution and lengthens the short-circuit time. At the same ON-state voltage (V-on) and 300 K, the E-off of PT LIGBT is 65.6% and 50.2% lower than that of N-drift Con. LIGBT and LIGBT with CS layer (CS LIGBT), respectively. The PT LIGBT improves the short-circuit time by 12% compared with that of the CS LIGBT.