NPRC-I/O: An NoC-Based Real-Time I/O System With Reduced Contention and Enhanced Predictability
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS(2023)
Abstract
All systems rely on inputs and outputs (I/Os) to perceive and interact with their surroundings. In safety-critical systems, it is important to guarantee both the performance and time-predictability of I/O operations. However, with the continued growth of architectural complexity in modern safety critical systems, satisfying such real-time requirements has become increasingly challenging due to complex I/O transaction paths and extensive hardware contention. In this article, we present a new Network-on-Chip (NoC)-based Predictable I/O system framework (NPRC-I/O) which reduces this contention and ensures the performance and time-predictability of I/O operations. Specifically, NPRC-I/O contains a programmable I/O command controller (NPRC-CC) and a run-time reconfigurable NoC ((RNoC)-No-2), which provides the capability to adjust I/O transaction paths at run time. Using this flexibility, we construct an end-to-end transmission latency analysis and an optimization engine that produces configurations for NPRCI/O and the I/O traffic in a given system. The constructed analysis and optimization engine guarantee the timing of all hard realtime traffic while reducing the deadline misses of soft real-time traffic and overall transmission latency.
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Key words
Architecture,microarchitecture,Network-on-Chip (NoC),real-time
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