Materials to System Co-optimization (MSCO™) for SRAM and its application towards Gate-All-Around Technology
2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)(2023)
Abstract
In this paper, we deploy our SRAM MSCO framework to evaluate the GAA SRAM performance and explore different performance optimization strategies. Our modeling indicates that GAA SRAM can have better stability, writability and read-current compared to FinFET SRAM, primarily due to better electrostatics and drive-strength ratio between nMOS and pMOS. Furthermore, we show that design optimizations through varying nanosheet count, nanosheet width and RMG workfunction allows GAA SRAM to be tailored for different applications.
MoreTranslated text
Key words
SRAM,GAA,FinFET,DTCO,SNM,Write Margin,circuit design,device modeling
AI Read Science
Must-Reading Tree
Example
![](https://originalfileserver.aminer.cn/sys/aminer/pubs/mrt_preview.jpeg)
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined