A Capacitorless LDO Regulator with Fast Feedback Loop and Damping-Factor-Control Frequency Compensation

A fast feedback loop (FFL) based on comparators is proposed in this paper. The FFL improves the transient response characteristics of the output-capacitorless low-dropout (OCL-LDO) regulator. When the load current switches between 1 mA and 100 mA with 1 mu s edge time, the overshoot and undershoot are 33 mV and 37 mV, respectively, and recovery time is 1.2 mu s and 1.6 mu s, respectively. A damping-factor-control (DFC) frequency compensation circuit is used to ensure the stability of the OCL-LDO, and the simulation results show that the phase margin exceeds 50 degree in the entire load variation range. This design is based on 180 nm process, and the area of the chip is 0.068 mm2 (without pads). A band-gap reference circuit is also designed in this work; its output voltage is 1.2 V and its temperature coefficient is 7.96 ppm/circle C. The input voltage range of the proposed OCL-LDO is 2.5 V to 5 V with a linear regulation rate of 0.128 mV/V and a load regulation rate of 0.0017 mV/mA. In addition, the load range of the proposed OCL-LDO is 0 mA to 100 mA, and the minimum required external capacitance is 0 F. The power supply rejection ratio (PSRR) is -46 dB @ 1 kHz.