Interface and oxide trap states of SiO₂/GaN metal-oxide-semiconductor capacitors and their effects on electrical properties evaluated by deep level transient spectroscopy

The relationship between the electrical properties and the carrier trap properties of the SiO2/GaN metal-oxide-semiconductor (MOS) capacitors was investigated using electrical measurements and deep level transient spectroscopy (DLTS). The capacitance-voltage (C-V) measurement showed that the frequency dispersion of the C-V curves became smaller after an 800 degrees C annealing in O-2 ambient. DLTS revealed that before the annealing, the interface trap states, in a broad energy range above the midgap of GaN, were detected with the higher interface state density at around 0.3 and 0.9 eV below the conduction band minimum (EC) of GaN. Moreover, the oxide trap states were formed at around 0.1 eV below the EC of GaN, plausibly indicating a slow electron trap with a tunneling process. Although both trap states affect the electrical reliability and insulating property of the SiO2/GaN MOS capacitors, they were found to drastically decrease after the annealing, leading to the improvement of the electrical properties.