FPGA-based Radar Altimeter Pulse Compression and Coherent Accumulation Implementation.

Coherent accumulation is an important technique to improve the detection capability of pulsed radar altimeter targets when range-walk and velocity ambiguity do not occur. This paper focuses on the pulse compression technique and the FPGA implementation of the coherent accumulation technique. As the radar signal requires high precision for processing data, and the precision of floating-point numbers is higher than that of fixed-point numbers in the process of hardware implementation. Therefore, the data types handled in this paper are all in the form of IEEE 754 standard single-precision floating-point numbers. On this basis, a complex multiplication model for floating-point numbers is designed and improved in this paper, and the proposed complex multiplication module achieves a lower LUT resources and better Static Timing compared with the traditional complex multiplication operation.