Implementation of FPGA-based miniaturization ACARS system

ACARS (Aircraft Communications Addressing and Reporting System) is an aircraft communication addressing and reporting system, which plays an important role in transmitting aircraft contact information. It is widely used for radio communications between aircrafts and ground base stations. Messages on aircraft flighting contains some important data about it, such as speed, altitude and heading. ACARS system’s development is conducive to the development and progress of China’s aviation technology and to the real-time monitoring and adjustment of aircraft according to messages we obtained, which ensures aircrafts safety to a certain extent. Performance of traditional ACARS system mainly depend on its receiver ability. A solution on this kind of method is to demodulate the baseband signal and decode the baseband signal with a PC. And the cost of decoding signals is great. It is because the RF signal is moved down to the baseband signal, which requires more frequency conversion stages (frequency conversion times), resulting in complex circuits and difficult debugging. In addition, analog circuits consist of discrete devices so that hardware system is bulky, inflexible and high power consumption. With the maturity of digital technology, it has advantages of miniaturization and low power consumption. The system of ACARS integrated digitalization adopts the combination of an analog superheterodyne down-conversion receiver and an integrated digital down-conversion (DDC) signal processing unit, which can effectively solve these problems, increase the flexibility and reliability of system, bring the convenience of module and system debugging, and reduce the bit error rate. The conference mainly introduces a design scheme on ACARS, explains the principle and function of each module, and designs the hardware circuit. Meanwhile, PCB circuit diagrams of key components are presented. Firstly, according to technical index, such as dynamic range, sensitivity and allocating gain of ACARS’ receiver are designed, analyzed and demonstrated. Secondly, AM/MSK modulation and demodulation algorithm suitable for FPGA implementation are derived. By improving demodulation algorithm, bit error rate can be reduced. Finally, our system is tested in actual environment.